论文信息 - ECSTAC: a fast asynchronous microprocessor

ECSTAC: a fast asynchronous microprocessor

This paper introduces some of the principal design issues encountered in the development of a prototype asynchronous microprocessor using a two-phase communication strategy. These issues include the control of the processor pipeline, register tagging, branch techniques, and the implementation of caches. The arbitration and synchronisation methods employed in the design are discussed, and expected performance figures based on block simulation results are given.

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