Analysis of errors in estimating wearout characteristics of time-dependent dielectric breakdown using system-level accelerated life test

Abstract Reliability issues exacerbated by small feature sizes in modern VLSI circuits challenge an accurate reliability assessment using the conventional approach of employing device-level accelerated life test. Since such device-level reliability assessment ignores tolerance of a circuit or a system to device wearout failures, to accurately estimate circuit/system reliability, we need to directly test a circuit or a system for extraction of wearout parameters in operating environments. In this paper, we propose a system-level accelerated life test to compliment device-level accelerated life test. We also investigate errors in estimating wearout parameters from time-dependent dielectric breakdown (TDDB) from experimental results from system-level accelerated life test and note differences from device-level reliability assessment.

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