Isolation Techniques Against Substrate Noise Coupling Utilizing Through Silicon Via (TSV) Process for RF/Mixed-Signal SoCs

The isolation techniques against substrate noise coupling utilizing through silicon via (TSV) process are described. The trench shape TSV encloses the RF circuit on a SoC chip to improve the isolation between digital circuits and the RF circuits without constraints of on-chip interconnect above first metal as the TSV is connected to the grounded 1st metal from the back side of the substrate. The analysis with simplified model is proposed to show the effect of the proposed isolation techniques. Mesh circuit model is applied to simulate the noise distribution in detail. Various test patterns are fabricated on a CMOS silicon substrate with resistivity of 10 Ωcm. The measurement pattern of H-shaped TSV confirms about 30 dB and 40 dB improvement at 100 MHz and 1 GHz respectively, which is much better than conventional isolation techniques such as guard ring, Deep N-well and DTI. The combinational pattern with TSV, DTI and high resistive layer shows 60 dB improvement of the isolation. Proposed isolation techniques are useful for substrate noise coupling of future RF/mixed-signal SoCs.

[1]  A. Iwata,et al.  Isolation strategy against substrate coupling in CMOS mixed-signal/RF circuits , 2005, Digest of Technical Papers. 2005 Symposium on VLSI Circuits, 2005..

[2]  T. Ohguro,et al.  90nm node RF CMOS technology with latch-up immunity on high-resistivity substrate , 2009, 2009 European Microwave Integrated Circuits Conference (EuMIC).

[3]  B. Verlinden,et al.  Electrical evaluation of 130-nm MOSFETs with TSV proximity in 3D-SIC structure , 2010, 2010 IEEE International Interconnect Technology Conference.

[4]  So-Ra Kim,et al.  8Gb 3D DDR3 DRAM using through-silicon-via technology , 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

[5]  Thomas Burger,et al.  A tri-band SAW-less WCDMA/HSPA RF CMOS transceiver with on-chip DC-DC converter connectable to battery , 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).

[6]  Jeong-Hyun Choi,et al.  A multistandard multiband mobile TV RF SoC in 65nm CMOS , 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).

[7]  Kazumasa Tanida,et al.  Chip Scale Camera Module (CSCM) using Through-Silicon-Via (TSV) , 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

[8]  T. Ohguro,et al.  Improvement of high resistivity substrate for future mixed analog-digital applications , 2002, 2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303).

[9]  Manolis Terrovitis,et al.  An 802.11g WLAN SoC , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

[10]  Luca Benini,et al.  Design Issues and Considerations for Low-Cost 3-D TSV IC Technology , 2010, IEEE Journal of Solid-State Circuits.

[11]  Hooman Darabi,et al.  A fully integrated SOC for 802.11b in 0.18-μm CMOS , 2005 .

[12]  Paresh Limaye,et al.  Design issues and considerations for low-cost 3D TSV IC technology , 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).