Energy-Efficient Motion-Triggered IoT CMOS Image Sensor With Capacitor Array-Assisted Charge-Injection SAR ADC

We propose a low-power image sensor with a motion-based triggering feature for the Internet of Things (IoT) applications. The sensor supports the near-pixel [within analog-to-digital converter (ADC)] motion-detection mode run on a heavily subsampled frame (32 <inline-formula> <tex-math notation="LaTeX">$\times $ </tex-math></inline-formula> 20 pixels, while consuming only 1.7 <inline-formula> <tex-math notation="LaTeX">$\mu \text{J}$ </tex-math></inline-formula>/frame) to trigger full-array capture only when a significant change has happened in the scene. Also, to maximize energy efficiency and image quality of the sensor, we propose a column-parallel capacitor array-assisted charge-injection SAR ADC that achieves 10b operation with readout noise of 226 <inline-formula> <tex-math notation="LaTeX">$\mu V_{\text {rms}}$ </tex-math></inline-formula>, which can be lowered to 104 <inline-formula> <tex-math notation="LaTeX">$\mu V_{\text {rms}}$ </tex-math></inline-formula> using multiple sampling. The ADC is highly energy efficient with best-in-class energy consumption of 63.6 pJ/frame/pixel and ADC Figure of Merit (FoM) of 14.4 <inline-formula> <tex-math notation="LaTeX">$\mu V_{\text {rms}}\cdot $ </tex-math></inline-formula>nJ in full-array capture mode.

[1]  Jong-Ho Park,et al.  A Delta-Readout Scheme for Low-Power CMOS Image Sensors With Multi-Column-Parallel SAR ADCs , 2016, IEEE Journal of Solid-State Circuits.

[2]  Hiroshi Takahashi,et al.  A 1/4-inch 8Mpixel back-illuminated stacked CMOS image sensor , 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

[3]  Thomas Toifl,et al.  28.5 A 10b 1.5GS/s pipelined-SAR ADC with background second-stage common-mode regulation and offset calibration in 14nm CMOS FinFET , 2017, 2017 IEEE International Solid-State Circuits Conference (ISSCC).

[4]  Atsushi Suzuki,et al.  6.1 A 1/1.7-inch 20Mpixel Back-illuminated stacked CMOS image sensor for new imaging applications , 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.

[5]  Suzuki Atsushi,et al.  A 1/1.7-inch 20Mpixel Back-illuminated Stacked CMOS Image Sensor for New Imaging Applications , 2015 .

[6]  Shoji Kawahito,et al.  Column-Parallel ADCs for CMOS Image Sensors and Their FoM-Based Evaluations , 2018, IEICE Trans. Electron..

[7]  Soon-Jyh Chang,et al.  A 0.92mW 10-bit 50-MS/s SAR ADC in 0.13μm CMOS process , 2009, 2009 Symposium on VLSI Circuits.

[8]  ByongChan Lim,et al.  A 220pJ/pixel/frame CMOS image sensor with partial settling readout architecture , 2016, 2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits).

[9]  Chih-Cheng Hsieh,et al.  A 0.4V 13b 270kS/S SAR-ISDM ADC with an opamp-less time-domain integrator , 2018, 2018 IEEE International Solid - State Circuits Conference - (ISSCC).

[10]  Ping Wah Wong,et al.  A Stacked CMOS Image Sensor With Array-Parallel ADC Architecture , 2018, IEEE Journal of Solid-State Circuits.

[11]  Yeonam Yoon,et al.  A 0.7-V 0.6- $\mu \text{W}$ 100-kS/s Low-Power SAR ADC With Statistical Estimation-Based Noise Reduction , 2017, IEEE Journal of Solid-State Circuits.

[12]  David Blaauw,et al.  A 467nW CMOS visual motion sensor with temporal averaging and pixel aggregation , 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

[13]  Arthur H. M. van Roermund,et al.  A 10b/12b 40 kS/s SAR ADC With Data-Driven Noise Reduction Achieving up to 10.1b ENOB at 2.2 fJ/Conversion-Step , 2013, IEEE Journal of Solid-State Circuits.

[14]  David Blaauw,et al.  5.2 Energy-Efficient Low-Noise CMOS Image Sensor with Capacitor Array-Assisted Charge-Injection SAR ADC for Motion-Triggered Low-Power IoT Applications , 2019, 2019 IEEE International Solid- State Circuits Conference - (ISSCC).

[15]  Michael P. Flynn,et al.  27.3 Area-efficient 1GS/s 6b SAR ADC with charge-injection-cell-based DAC , 2016, 2016 IEEE International Solid-State Circuits Conference (ISSCC).

[16]  Yoshikazu Nitta,et al.  A 1/4-inch 3.9Mpixel low-power event-driven back-illuminated stacked CMOS image sensor , 2018, 2018 IEEE International Solid - State Circuits Conference - (ISSCC).

[17]  Tetsuya Hayashida,et al.  6.2 133Mpixel 60fps CMOS image sensor with 32-column shared high-speed column-parallel SAR ADCs , 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.

[18]  Pieter Harpe A 0.0013mm2 10b 10MS/s SAR ADC with a 0.0048mm2 42dB-Rejection Passive FIR Filter , 2019, 2019 IEEE Custom Integrated Circuits Conference (CICC).

[19]  Koga Hiroki,et al.  A 1/2.3in 20Mpixel 3-Layer Stacked CMOS Image Sensor with DRAM , 2017 .