Multiclock Esterel

We present the Multiclock Esterel language, which extends the synchronous language Esterel to multiple clock zones. While Esterel is good for compact single-clocked hardware or software designs, modern electronic designs are growing rapidly and they can no longer be designed in a monolithic fashion. Problems such as clock distribution, complexity, and power limitations have led designers to construct designs in a modular, multiple clock fashion. Multiclock Esterel is designed precisely to address this design style. It is a natural extension of Esterel, and retains its strong synchronous semantics and internal determinism. Statements driven by different clocks communicate through two special devices called the sampler and the reclocker. Multiclock Esterel should be understood as a preliminary language proposal meant to study multiclocking. It has not yet been validated by large experiments.

[1]  Luciano Lavagno,et al.  Hardware-Software Co-Design of Embedded Systems , 1997 .

[2]  Pascal Raymond,et al.  The synchronous data flow programming language LUSTRE , 1991, Proc. IEEE.

[3]  Randy H. Katz,et al.  Contemporary Logic Design , 2004 .

[4]  Luciano Lavagno,et al.  Hardware-software co-design of embedded systems: the POLIS approach , 1997 .

[5]  Gérard Berry Constructive Semantics of Esterel: From Theory to Practice (Abstract) , 1996, AMAST.

[6]  Paul Caspi,et al.  About the Design of Distributed Control Systems: The Quasi-Synchronous Approach , 2001, SAFECOMP.

[7]  Gérard Berry,et al.  Esterel on hardware , 1992, Philosophical Transactions of the Royal Society of London. Series A: Physical and Engineering Sciences.

[8]  Gérard Berry,et al.  The Esterel Synchronous Programming Language: Design, Semantics, Implementation , 1992, Sci. Comput. Program..

[9]  Gérard Berry,et al.  Preemption in Concurrent Systems , 1993, FSTTCS.

[10]  Thierry Gautier,et al.  Programming real-time applications with SIGNAL , 1991, Proc. IEEE.

[11]  Robert K. Brayton,et al.  Sequential circuit design using synthesis and optimization , 1992, Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors.