A Low-Noise Chopper Amplifier Designed for Multi-Channel Neural Signal Acquisition

This paper proposed the design of a low-noise, low total harmonic distortion (THD) chopper amplifier for neural signal acquisition. A dc servo loop (DSL) based on active Gm-C integrator is proposed to reject the electrode-dc-offset (EDO). Architecture of a complementary input very low-transconductance (VLT) operational transconductance amplifier (OTA) was proposed and integrated in the active Gm-C integrator to improve the linearity as well as to reduce the noise, featuring a transconductance ranging from 45 pS to a few nS. The proposed amplifier was fabricated in a TSMC 0.18-<inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> CMOS process, occupying an area of 0.2 mm <sup>2</sup>, featuring a power consumption of <inline-formula> <tex-math notation="LaTeX">$3.24~\mu \text{W}$ </tex-math></inline-formula>/channel under a 1.8-V supply voltage. The THD for a 5-mV<sub>pp</sub> input is lower than −61 dB. An input-referred thermal noise power spectral density (PSD) of 39 nV/<inline-formula> <tex-math notation="LaTeX">$\sqrt {\text {Hz}}$ </tex-math></inline-formula> is measured. The measured input-referred noise is <inline-formula> <tex-math notation="LaTeX">$0.65~\mu \text {V}_{\text {rms}}$ </tex-math></inline-formula> in the 0.3–200-Hz frequency band and <inline-formula> <tex-math notation="LaTeX">$2.14~\mu \text{V}_{\text {rms}}$ </tex-math></inline-formula> in the 200-Hz–5-kHz frequency band, respectively, leading to a noise-efficiency factor of 2.37 (0.3–200 Hz) and 1.56 (0.2 k–5 kHz). In addition, the high-pass corner frequency can be precisely configured and linearly adjusted with the external bias current from 0.35 to 54.5 Hz.

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