Robust Sampling Clock Recovery Algorithm for Wideband Networking Waveform of SDR

A novel technique for sampling clock recovery in a wideband networking waveform of a software defined radio is proposed. Sampling clock recovery is very important in wideband networking radio operation as it directly affects the Medium Access adaptive time slot switching rate. The proposed Sampling clock recovery algorithm consists of three stages. In the first stage, Sampling Clock Offset (SCO) is estimated at chip level. In the second stage, the SCO estimates are post-filtered to improve the tracking performance. We present a new post-filtering method namely Steady-State State-Space Recursive Least Squares with Adaptive Memory (S4RLSWAM). For the third stage of SCO compensation, a feedforward Lagrange interpolation based algorithm is proposed. Real-time hardware results have been presented to demonstrate the effectiveness of the proposed algorithms and architecture for systems requiring high data throughput. It is shown that both the proposed algorithms achieve better performance as compared to existing algorithms.