Automatic verification of estimate functions with polynomials of bounded functions

The correctness of some arithmetic functions can be expressed in terms of the magnitude of errors. A reciprocal estimate function that returns an approximation of 1/x is such a function that is implemented in microprocessors. This paper describes an algorithm to prove that the error of an arithmetic function is less than its requirement. It divides the input domain into tiny segments, and for each segment we evaluate a requirement formula. The evaluation is carried out by converting an arithmetic function to what we call a polynomial of bounded functions, and then its upper bound is calculated and checked if it meets the requirement. The algorithm is implemented as a set of rewriting rules and computed-hints of the ACL2 theorem prover. It has been used to verify reciprocal estimate and reciprocal square root estimate instructions of one of the IBM POWER™ processors.

[1]  César A. Muñoz,et al.  Verified Real Number Calculations: A Library for Interval Arithmetic , 2007, IEEE Transactions on Computers.

[2]  John Harrison.  Verifying the Accuracy of Polynomial Approximations in HOL , 1997, TPHOLs.

[3]  Randal E. Bryant,et al.  Verification of Floating-Point Adders , 1998, CAV.

[4]  John Harrison.  Formal Verification of Square Root Algorithms , 2003, Formal Methods Syst. Des..

[5]  Jason Baumgartner,et al.  Scalable conditional equivalence checking: An automated invariant-generation based approach , 2009, 2009 Formal Methods in Computer-Aided Design.

[6]  J. Strother Moore,et al.  A Mechanically Checked Proof of the AMD5K86TM Floating Point Division Program , 1998, IEEE Trans. Computers.

[7]  John Harrison,et al.  Formal Verification of IA-64 Division Algorithms , 2000, TPHOLs.

[8]  Jun Sawada,et al.  ACL2SIX: A Hint used to Integrate a Theorem Prover and an Automated Verification Tool , 2006, 2006 Formal Methods in Computer Aided Design.

[9]  Randal E. Bryant,et al.  Graph-Based Algorithms for Boolean Function Manipulation , 1986, IEEE Transactions on Computers.

[10]  Panagiotis Manolios,et al.  Computer-aided reasoning : ACL2 case studies , 2000 .

[11]  Jason Baumgartner,et al.  Automatic formal verification of fused-multiply-add FPUs , 2005, Design, Automation and Test in Europe.

[12]  Jun Sawada,et al.  Mechanical Verification of a Square Root Algorithm Using Taylor's Theorem , 2002, FMCAD.

[13]  Jason Baumgartner,et al.  Scalable Sequential Equivalence Checking across Arbitrary Design Transformations , 2006, 2006 International Conference on Computer Design.

[14]  Lawrence C. Paulson,et al.  MetiTarski: An Automatic Theorem Prover for Real-Valued Special Functions , 2010, Journal of Automated Reasoning.

[15]  Anna Slobodov.  Challenges for formal verification in industrial setting , 2006 .

[16]  Sandip Ray,et al.  Integrating external deduction tools with ACL2 , 2006, J. Appl. Log..

[17]  Natarajan Shankar,et al.  PVS: A Prototype Verification System , 1992, CADE.

[18]  M. Gordon,et al.  Introduction to HOL: a theorem proving environment for higher order logic , 1993 .

[19]  David M. Russinoff.  A Mechanically Checked Proof of IEEE Compliance of the Floating Point Multiplication, Division and Square Root Algorithms of the AMD-K7™ Processor , 1998, LMS J. Comput. Math..

[20]  C. Seger,et al.  Formally Verifying IEEE Compliance of Floating-Point Hardware , 2022 .

[21]  Panagiotis Manolios,et al.  Computer-Aided Reasoning: An Approach , 2011 .

[22]  Jason Baumgartner,et al.  Scalable Automated Verification via Expert-System Guided Transformations , 2004, FMCAD.

[23]  Peter W. Markstein,et al.  Software Division and Square Root Using Goldschmidt's Algorithms , 2004 .

[24]  Anna Slobodová.  Challenges for Formal Verification in Industrial Setting , 2006, FMICS/PDMC.

[25]  Guido D. Salvucci,et al.  Ieee standard for binary floating-point arithmetic , 1985 .