Modular charge recycling pass transistor logic (MCRPL)
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Modular charge recycling pass transistor logic (MCRPL) based on the charge recycling concept and a modular circuit design methodology is proposed for high speed and low power applications. In an 8 bit comparator, MCRPL improves the power-delay product over that obtained using dynamic differential cascode voltage switch (DCVS) logic and half-rail differential logic (HRDL) by 53 and 30%, respectively.
[1] G.R. Hellestrand,et al. Half-rail differential logic , 1997, 1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers.
[2] L. Heller,et al. Cascode voltage switch logic: A differential CMOS logic family , 1984, 1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.
[3] Kwyro Lee,et al. Charge recycling differential logic (CRDL) for low power application , 1996 .