Using data compression in automatic test equipment for system-on-chip testing
暂无分享,去创建一个
Fabrizio Lombardi | Waleed Meleis | Zainalabedin Navabi | Farzin Karimi | F. Lombardi | W. Meleis | F. Karimi | Z. Navabi
[1] Abraham Lempel,et al. A universal algorithm for sequential data compression , 1977, IEEE Trans. Inf. Theory.
[2] Abraham Lempel,et al. Compression of individual sequences via variable-rate coding , 1978, IEEE Trans. Inf. Theory.
[3] Robert F. Rice,et al. Some practical universal noiseless coding techniques , 1979 .
[4] Terry A. Welch,et al. A Technique for High-Performance Data Compression , 1984, Computer.
[5] Eugene L. Lawler,et al. The Traveling Salesman Problem: A Guided Tour of Combinatorial Optimization , 1985 .
[6] P.G. Howard,et al. Fast and efficient lossless image compression , 1993, [Proceedings] DCC `93: Data Compression Conference.
[7] Irith Pomeranz,et al. Dynamic test compaction for synchronous sequential circuits using static compaction techniques , 1996, Proceedings of Annual Symposium on Fault Tolerant Computing.
[8] Elizabeth M. Rudnick,et al. Simulation-based techniques for dynamic test sequence compaction , 1996, ICCAD 1996.
[9] Dong Sam Ha,et al. An efficient method for compressing test data , 1997, Proceedings International Test Conference 1997.
[10] Srimat T. Chakradhar,et al. Static test sequence compaction based on segment reordering and accelerated vector restoration , 1998, Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270).
[11] Dong Sam Ha,et al. COMPACT: a hybrid method for compressing test data , 1998, Proceedings. 16th IEEE VLSI Test Symposium (Cat. No.98TB100231).
[12] Hans-Joachim Wunderlich,et al. Accumulator based deterministic BIST , 1998, Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270).
[13] Nur A. Touba,et al. Test vector decompression via cyclical scan chains and its application to testing core-based designs , 1998, Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270).
[14] Nur A. Touba,et al. Scan vector compression/decompression using statistical coding , 1999, Proceedings 17th IEEE VLSI Test Symposium (Cat. No.PR00146).
[15] Nur A. Touba,et al. Using an embedded processor for efficient deterministic testing of systems-on-a-chip , 1999, Proceedings 1999 IEEE International Conference on Computer Design: VLSI in Computers and Processors (Cat. No.99CB37040).
[16] Krishnendu Chakrabarty,et al. System-on-a-chip test-data compression and decompressionarchitectures based on Golomb codes , 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[17] Krishnendu Chakrabarty,et al. Test Resource Partitioning for SOCs , 2001, IEEE Des. Test Comput..
[18] Krishnendu Chakrabarty,et al. Test Resource Partitioning , 2002 .
[19] Krishnendu Chakrabarty,et al. Test data compression and decompression based on internal scanchains and Golomb coding , 2002, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[20] Krishnendu Chakrabarty,et al. How effective are compression codes for reducing test data volume? , 2002, Proceedings 20th IEEE VLSI Test Symposium (VTS 2002).
[21] Lei Li,et al. Test Data Compression Using Dictionaries with Fixed-Length Indices , 2003 .