A high-performance ATM switch with completely and fairly shared buffers

Sharing buffer space between switch ports greatly improves the performance of the switching systems. However sharing buffers in a fair manner is not an easy task. In this paper we propose a high-performance ATM switching system with fairly and completely shared buffers. The core of the proposed switching system is a novel buffer management mechanism with which buffer space in the switching system can be completely shared by all the switch ports in a fair manner. The proposed buffer management mechanism works based on a simple algorithm and can be easily implemented by hardware. The performance of the proposed switching system is evaluated by both analytical model and simulation. The results show that high buffer utilization and low packet lost ratio can be achieved under both uniform and nonuniform traffic loads.