Strongly Code Disjoint Checkers
暂无分享,去创建一个
[1] B. Courtois,et al. Design of SCD Checkers based on Analytical Fault Hypotheses , 1984, ESSCIRC '84: Tenth European Solid-State Circuits Conference.
[2] EDWARD J. McCLUSKEY,et al. Fault Equivalence in Combinational Logic Networks , 1971, IEEE Transactions on Computers.
[3] James E. Smith,et al. Strongly Fault Secure Logic Networks , 1978, IEEE Transactions on Computers.
[4] B. Courtois. Failure mechanisms, fault hypotheses and analytical testing of LSI-NMOS (HMOS) circuits , 1981 .
[5] John F. Wakerly,et al. Partially Self-Checking Circuits and Their Use in Performing Logical Operations , 1973, IEEE Transactions on Computers.
[6] Sudhakar M. Reddy,et al. On Totally Self-Checking Checkers for Separable Codes , 1977, IEEE Transactions on Computers.
[7] Yves Crouzet,et al. Physical Versus Logical Fault Models MOS LSI Circuits: Impact on Their Testability , 1980, IEEE Transactions on Computers.
[8] William C. Carter,et al. Design of dynamically checked computers , 1968, IFIP Congress.
[9] D. A. Anderson,et al. Design of self-checking digital networks using coding techniques , 1971 .