JHDLBits: The Merging of Two Worlds

This paper introduces JHDLBits, the integration of two prominent FPGA design tools: JHDL and JBits. JHDLBits offers the low-level access and control provided by JBits with the high-level structural circuit design of JHDL. Furthermore, the JHDLBits flow provides greater control of resource manipulation, placement, and routing, and gives researchers a “sandbox” to explore advanced interactions with FPGA bitstreams. This paper presents the overall architecture of the open-source JHDLBits project. Details are provided on how the core components – JHDL, JBits3 for Virtex-II, and the ADB connectivity database – are linked together to provide a cohesive design environment.

[1]  Peter M. Athanas,et al.  An alternate wire database for Xilinx FPGAs , 2004, 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines.

[2]  Jesse Everett Hunter.  A Device-Level FPGA Simulator , 2000 .

[3]  Steven A. Guccione,et al.  XBI: a Java-based interface to FPGA hardware , 1998, Other Conferences.

[4]  Neil Joseph Steiner.  A Standalone Wire Database for Routing and Tracing in Xilinx Virtex, Virtex-E, and Virtex-II FPGAs , 2002 .

[5]  Jing Ma.  Incremental Design Techniques with Non-Preemptive Refinement for Million-Gate FPGAs , 2003 .

[6]  Peter M. Athanas,et al.  A versatile framework for FPGA field updates: an application of partial self-reconfiguration , 2003, 14th IEEE International Workshop on Rapid Systems Prototyping, 2003. Proceedings..

[7]  Karl S. Hemmert,et al.  A CAD suite for high-performance FPGA design , 1999, Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines (Cat. No.PR00375).

[8]  Steven A. Guccione,et al.  BoardScope : A debug tool for reconfigurable systems , 1998 .

[9]  Vaughn Betz,et al.  VPR: A new packing, placement and routing tool for FPGA research , 1997, FPL.