论文信息 - A monolithic phase-locked loop with post detection processor

A monolithic phase-locked loop with post detection processor

Describes the design and fabrication of a high-frequency (50-MHz) phase-locked loop with a post detection processor which allows the detection of FSK signals with few external components. The circuit operates with a single 5-V supply and has TTL compatible inputs and outputs.

E.N. Murthi

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