An On-board Data-Handling Computer for Deep-Space Exploration Built Using Commercial-Off-the-Shelf SRAM-Based FPGAs

The use of commercial-of-the-shelf SRAM-based FPGA devices in space applications is not yet a reality due to concerns still existing about the device reliability; therefore, more conservative approaches based on anti-fuse FPGAs are currently preferred. The major concern about the use of such devices in space stems from their sensitivity to ionizing radiation, which may alter the content of the design the device implements, and which forces to adopt error mitigation techniques that have very high resource overheads. In this paper we analyze a realistic case study taken from a future space mission, and we show how mitigation techniques that combine hardware and software redundancy can provide very good fault tolerance capabilities to designs that include processor cores, while reducing significantly the overhead of the mitigation technique with respect to the hardware redundancy approach that is nowadays used.

[1]  G.R. Allen Compendium of Test Results of Single Event Effects Conducted by the Jet Propulsion Laboratory , 2008, 2008 IEEE Radiation Effects Data Workshop.

[2]  Ricardo Reis,et al.  A low-cost SEE mitigation solution for soft-processors embedded in Systems on Pogrammable Chips , 2009, 2009 Design, Automation & Test in Europe Conference & Exhibition.

[3]  S. Rezgui,et al.  New Methodologies for SET Characterization and Mitigation in Flash-Based FPGAs , 2007, IEEE Transactions on Nuclear Science.

[4]  C. Carmichael,et al.  Single Event Upsets in Xilinx Virtex-4 FPGA Devices , 2006, 2006 IEEE Radiation Effects Data Workshop.

[5]  Dhiraj K. Pradhan,et al.  Processor- and memory-based checkpoint and rollback recovery , 1993, Computer.

[6]  G.M. Swift,et al.  Single Event Effects Test Results for Advanced Field Programmable Gate Arrays , 2006, 2006 IEEE Radiation Effects Data Workshop.

[7]  C. Carmichael,et al.  SEU mitigation testing of Xilinx Virtex II FPGAs , 2003, 2003 IEEE Radiation Effects Data Workshop.

[8]  Massimo Violante,et al.  A new reliability-oriented place and route algorithm for SRAM-based FPGAs , 2006, IEEE Transactions on Computers.

[9]  D. Merodio,et al.  Experimental Validation of a Tool for Predicting the Effects of Soft Errors in SRAM-Based FPGAs , 2007, IEEE Transactions on Nuclear Science.