A CostAnalysis FrameworkforMulti-core Systems withSpares

Itbecomesincreasingly difficult toachieve a high manufacturingyieldfor multi-core chips duetolarger chip sizes, higher device densities, andgreater failure rates. By addinga limited numberofsparecorestoreplace defective cores either before shipment orinthefield, the effective yield ofthechip anditsoverall costcanbe significantly improved. Inthis paper, wepropose ayield andcostanalysis framework tobetter understand the dependency ofamulti-core chip's costonkeyparameters suchasthenumberofcores andspares, coreyield, and defect coverage ofmanufacturing andin-field testing. Our analysis showsthat wecaneliminate theburn-in process whenwehavesomespare cores forin-field recovery. We demonstrate thata highdefect coverage forin-field testing, a necessity forsupporting in-field recovery, is essentialfor overall cost reduction. Wealso illustrate that, within-field recovery capability, thereliance onhigh quality manufacturing testing issignificantly reduced