Comparative study of vertical GAA TFETs and GAA MOSFETs in function of the inversion coefficient

In this work, a comparative study between vertical silicon GAA TFETs and silicon GAA MOSFETs was realized, focusing on relevant analog parameters, as transistor efficiency, Early voltage, intrinsic voltage gain, unity gain frequency, and the product of the transistor efficiency multiplied by the unity gain frequency. The key parameter of comparison is the inversion coefficient (IC). The analysis was performed considering the different conduction regimes (weak, moderate and strong). MOSFETs have presented a higher transistor efficiency and a lower value of Early voltage in comparison with TFETs. In contrast, the latter technology presents a higher intrinsic voltage gain for the whole range of extracted ICs. Some other figures of merits, as the unity gain frequency and the product of the unity gain frequency and the transistor efficiency were obtained. A plateau was observed for the MOSFETs, but the TFETs transconductance and product only increase with the gate voltage.

[1]  J. Knoch,et al.  Modeling of High-Performance p-Type III–V Heterojunction Tunnel FETs , 2010, IEEE Electron Device Letters.

[2]  A. Mallik,et al.  Tunnel Field-Effect Transistors for Analog/Mixed-Signal System-on-Chip Applications , 2012, IEEE Transactions on Electron Devices.

[3]  A. Vandooren,et al.  NW-TFET analog performance for different Ge source compositions , 2013, 2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

[4]  Cor Claeys,et al.  Experimental Comparison Between Trigate p-TFET and p-FinFET Analog Performance as a Function of Temperature , 2013, IEEE Transactions on Electron Devices.

[5]  Adrian M. Ionescu,et al.  Tunnel field-effect transistors as energy-efficient electronic switches , 2011, Nature.

[6]  Willy Sansen,et al.  analog design essentials , 2011 .

[7]  Rita Rooyackers,et al.  Analysis of trap-assisted tunneling in vertical Si homo-junction and SiGe hetero-junction Tunnel-FETs , 2013 .

[8]  K. Maex,et al.  Boosting the on-current of a n-channel nanowire tunnel field-effect transistor by source material optimization , 2008 .

[9]  Cor Claeys,et al.  Influence of the Source Composition on the Analog Performance Parameters of Vertical Nanowire-TFETs , 2015, IEEE Transactions on Electron Devices.

[10]  Cor Claeys,et al.  Analog performance of vertical nanowire TFETs as a function of temperature and transport mechanism , 2015 .

[11]  G. Amaratunga,et al.  Silicon surface tunnel transistor , 1995 .

[12]  Guoqiang Zhang,et al.  Encapsulated gate-all-around InAs nanowire field-effect transistors , 2013 .