论文信息 - VHDL analog extensions: process, issues, and status

VHDL analog extensions: process, issues, and status

The activity involved in developing language extensions to VHSIC hardware description languages (VHDL) to provide a mixed-mode digital/analog descriptive capability is presented. The history of the organization that is responsible for developing these extensions is presented. The process being used to develop the standard is described, along with a progress report. The general guidelines being followed by the group are explained, and some of the fundamental issues and design issues being addressed are detailed.<<ETX>>

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