Efficient Group KeyManagement with Tamper-resistant ISA Extensions

We present a tamper-resistant architectural enhancement for secure group key management in group communication applications. Using specially designed four cryptographic instructions, we show that the hardware assisted design can greatly reduce the management overhead to the order of O(1) in terms of rekey messages, storage cost, and the encryption computation cost

[1]  Markus G. Kuhn,et al.  Tamper resistance: a cautionary note , 1996 .

[2]  G. Edward Suh,et al.  The AEGIS Processor Architecture for Tamper-Evident and Tamper-Resistant Processing , 2003 .

[3]  David Hutchison,et al.  A survey of key management for secure group communication , 2003, CSUR.

[4]  G. Edward Suh,et al.  AEGIS: architecture for tamper-evident and tamper-resistant processing , 2003 .

[5]  G. Edward Suh,et al.  Caches and Merkle Trees for Efficient Memory Authentication , 2002 .

[6]  Mohamed G. Gouda,et al.  Secure group communications using key graphs , 2000, TNET.

[7]  Butler W. Lampson,et al.  A Trusted Open Platform , 2003, Computer.

[8]  Amos Fiat,et al.  Broadcast Encryption , 1993, CRYPTO.

[9]  Dan Boneh,et al.  Architectural Support For Copy And Tamper-Resistant Software PhD Thesis , 2003 .

[10]  Ruby B. Lee,et al.  Architecture for protecting critical secrets in microprocessors , 2005, 32nd International Symposium on Computer Architecture (ISCA'05).

[11]  Jun Yang,et al.  Architectural support for protecting user privacy on trusted processors , 2005, CARN.

[12]  Patrick Schaumont,et al.  Unlocking the design secrets of a 2.29 Gb/s Rijndael processor , 2002, DAC '02.

[13]  Christian S. Collberg,et al.  Watermarking, Tamper-Proofing, and Obfuscation-Tools for Software Protection , 2002, IEEE Trans. Software Eng..

[14]  M. Kuhn,et al.  The Advanced Computing Systems Association Design Principles for Tamper-resistant Smartcard Processors Design Principles for Tamper-resistant Smartcard Processors , 2022 .

[15]  Jun Yang,et al.  Fast secure processor for inhibiting software piracy and tampering , 2003, Proceedings. 36th Annual IEEE/ACM International Symposium on Microarchitecture, 2003. MICRO-36..

[16]  Uri C. Weiser,et al.  MMX technology extension to the Intel architecture , 1996, IEEE Micro.

[17]  David Brumley,et al.  Remote timing attacks are practical , 2003, Comput. Networks.

[18]  Markus G. Kuhn,et al.  Low Cost Attacks on Tamper Resistant Devices , 1997, Security Protocols Workshop.

[19]  Bennet S. Yee,et al.  Dyad : a system for using physically secure coprocessors , 1991 .