论文信息 - Measurements and analysis of PLL jitter caused by digital switching noise

Measurements and analysis of PLL jitter caused by digital switching noise

Substrate coupling between a noise-generating digital circuit and analog PLL's realized in a standard low-resistivity substrate 0.25µm CMOS process is analyzed. It is found that the main source of jitter strongly depends on the power supply configuration of the PLL.

P. Larsson | P. Larsson

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