Reduction of overhead in adaptive body bias technology due to triple-well structure based on measurement and simulation
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Yasuhiro Ogasahara | Toshiyuki Tsutsumi | Masakazu Hioki | Tadashi Nakagawa | Toshihiro Sekigawa | Hanpei Koike
[1] Vivek De,et al. Effectiveness of adaptive supply voltage and body bias for reducing impact of parameter variations in low power and high performance microprocessors , 2002, VLSIC 2002.
[2] J. Tschanz,et al. Effectiveness of adaptive supply voltage and body bias for reducing impact of parameter variations in low power and high performance microprocessors , 2002, 2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302).
[3] A.P. Chandrakasan,et al. A 175 mV multiply-accumulate unit using an adaptive supply voltage and body bias (ASB) architecture , 2002, 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315).
[4] Yasuhiro Ogasahara,et al. SOTB Implementation of a Field Programmable Gate Array with Fine-Grained Vt Programmability , 2014 .
[5] N. Sugii,et al. Local $V_{\rm th}$ Variability and Scalability in Silicon-on-Thin-BOX (SOTB) CMOS With Small Random-Dopant Fluctuation , 2010, IEEE Transactions on Electron Devices.
[6] Trevor Mudge,et al. Combined dynamic voltage scaling and adaptive body biasing for lower power microprocessors under dynamic workloads , 2002, ICCAD 2002.