Digital Radio Front-End for High Data Rate Impulse UWB System

This paper presents on overview of the two chip integration of a digital radio receiver for wireless communication systems based on ultra wideband (UWB) impulse radio technology. The chips have been integrated in a 130 nm CMOS technology. The front-end performs 1-bit direct sampling of the RF signal. The baseband processing is implemented in a FPGA. The UWB link demonstration runs at 78.125Mpulse/s using polarity and a coding rate of 1/2 which gives a maximum information data rate of 39.1Mb/s (limited by the highest FPGA demodulation rate).