A compiler algorithm for optimizing locality in loop nests

This paper describe8 an algorithm to optimize cache locality in scientific codes on uniprocessor and multiprocessor machines. A distinctive characteristic of our algorithm is that it considers loop and data layout transformations in a unified framework. We illustrate through example8 that our approach is very effective at reducing cache misses and tilesize sensitivity of blocked loop nests; and can optimize nests for which optimization technique8 based on loop transformations alone are not succe88ful. An important special ceze is the one in which data layouts of some arrays are fixed and cannot be changed. We show how our algorithm can handle this ca8e, and demonstrate how it can be used to optimize multiple loop nests.

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