DSP-Based Design Flows

This chapter discusses design flow based on digital signal processing (DSP). DSP refers to the branch of electronics concerned with the representation and manipulation of signals in digital form. This form of processing includes compression, decompression, and modulation, error correction, filtering, and otherwise manipulating audio, video, image, and similar data for such applications as telecommunications, radar, and image processing. A library of DSP functional blocks can be created at the system/algorithmic level of abstraction along with a one-to-one equivalent library of blocks at the register-transfer level (RTL) level of abstraction in Verilog. The aim is to capture and verify the design using a hierarchy of functional blocks specified at the system/algorithmic level of abstraction. As an alternative, the larger FPGA vendors typically offer IP core generators. In several cases, these core generators have been integrated into system-/algorithmic-level environments. This means that a design can be created based on a collection of these blocks in the system-/algorithmic-level environment, specify any parameters associated with these blocks, and perform system-/algorithmic-level verification.