Partition Compression Flash Translation Layer Based on Data Separation

Flash translation layers play an important role in determining the storage performance and lifetime of NAND flash-based electronics devices. And file system designs are undergoing rapid evolution to exploit the potentials of flash memory. Although many compression Flash Translation Layer (FTLs) have been designed, there is serious overhead for the software compression or even hardware compression and decompression process which are inevitable. In this paper, we present a partition FTL which can distinguish the file system metadata and user data. After the division of the mapping table, we add transparent data compression to the user data part, a logical partition compression, called pcFTL, which reduces the amount of data written into NAND flash memory. In addition, no more decrease in (Solid state drive) SSD performance due to no filesystem metadata compression overhead. Transplanting compression on user data part, other than file system data part not only benefit disk performance but also save SDRAM space. pcFTL is one kind of filesystem suited FTL design.

[1]  Wei Xie,et al.  An Adaptive Separation-Aware FTL for Improving the Efficiency of Garbage Collection in SSDs , 2014, 2014 14th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing.

[2]  Sungjin Lee,et al.  To collect or not to collect: Just-in-time garbage collection for high-performance SSDs with long lifetimes , 2015, 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC).

[3]  Jihong Kim,et al.  Application-Managed Flash , 2016, FAST.

[4]  Fei Wu,et al.  Program error rate-based wear leveling for NAND flash memory , 2018, 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[5]  Youguang Zhang,et al.  ZFTL: A Zone-based Flash Translation Layer with a two-tier selective caching mechanism , 2012 .

[6]  Evangelos Eleftheriou,et al.  Write amplification analysis in flash-based solid state drives , 2009, SYSTOR '09.

[7]  Fei Wu,et al.  Understanding and Alleviating the Impact of the Flash Address Translation on Solid State Devices , 2017, ACM Trans. Storage.

[8]  Abraham Lempel,et al.  A universal algorithm for sequential data compression , 1977, IEEE Trans. Inf. Theory.

[9]  Li-Pin Chang,et al.  On efficient wear leveling for large-scale flash-memory storage systems , 2007, SAC '07.

[10]  Wei-Kuan Shih,et al.  KVFTL: Optimization of storage space utilization for key-value-specific flash storage devices , 2017, 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC).

[11]  Ping Ma,et al.  A stability constrained adaptive alpha for gravitational search algorithm , 2018, Knowl. Based Syst..

[12]  Kern Koh,et al.  A flash compression layer for SmartMedia card systems , 2004, IEEE Transactions on Consumer Electronics.

[13]  Zvonimir Bandic,et al.  LightNVM: Lightning Fast Evaluation Platform for Non-Volatile Memories , 2014 .

[14]  Jiangbin Zheng,et al.  Big Data Analytics and Mining for Effective Visualization and Trends Forecasting of Crime Data , 2019, IEEE Access.

[15]  André Brinkmann,et al.  Time-efficient Garbage Collection in SSDs , 2018, ArXiv.

[16]  Wei Feng,et al.  Class imbalance ensemble learning based on the margin theory , 2018 .

[17]  Youyou Lu,et al.  ParaFS: A Log-Structured File System to Exploit the Internal Parallelism of Flash Devices , 2016, USENIX Annual Technical Conference.

[18]  Lei Zhang,et al.  S-FTL: An efficient address translation for flash memory by exploiting spatial locality , 2011, 2011 IEEE 27th Symposium on Mass Storage Systems and Technologies (MSST).

[19]  Jin-Soo Kim,et al.  zFTL: power-efficient data compression support for NAND flash-based consumer electronics devices , 2011, IEEE Transactions on Consumer Electronics.