A 2-D folded Hall device, fabricated in a standard 0.35"m CMOS process, is proposed. By simultaneously altering the bias currents and the polarities of p + -implant and n + -implant contacts, the experimental results exhibit that the bulk parasitic magnetotransistor presents either the best magnetosensitivity or the highest induced Hall voltage at the supply bias current 20mA. A further analyses of the interactions between the Hall device, the lateral mag- netotransistor and the vertical parasitic magnetotransistor show that the dominant mechanism evoked by the magnetic induction is the hybrid efiect which mixed with the Hall efiect and the fllament magneto-sensitive efiect. By the way, the maximum supply-voltage-related sensitivity of the hybrid efiect of vertical magnetoresistor and bulk magnetotransistor is about 68 and 48 times larger than that of the Hall device and the lateral parasitic magnetotransistor, respectively. Note that the maximum induced Hall voltage of the hybrid efiect of vertical magnetoresistor and bulk magnetotransistor magnetotransistor is also greater than that of the Hall device and the lateral parasitic magnetotransistor by 136 and 9 times, while the ampliflcation function of the lateral parasitic magnrtotransistor appears at the higher supply bias current. The largest supply- current-related sensitivity is presented with 3.838(V/A*T).
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