Chip/Package/Board Co-Design Methodology Applied to Full-Custom Heterogeneous Integration

Heterogeneous integration leads to significant increase in design complexity. We present a modular full-custom chip/package/board co-design environment based on a versatile backbone idea, which has been used successfully in various system-in-package (SiP) designs. We show challenges and solutions for co-design applied to traditional leadframe assembly and packaging (e.g. QFP, QFN, TO, SON, DSO) as well as more recent technologies like FOWLP or laminate BGA and LGA.

[1]  K. Pressel,et al.  System integration with eWLB , 2010, 3rd Electronics System Integration Technology Conference ESTC.

[2]  Andy Heinig,et al.  Enabling automatic system design optimization through Assembly Design Kits , 2015, 2015 International 3D Systems Integration Conference (3DIC).

[4]  M. Wojnowski,et al.  Novel embedded Z line (EZL) vertical interconnect technology for eWLB , 2015, 2015 IEEE 65th Electronic Components and Technology Conference (ECTC).

[5]  Thomas Brandtner.  Chip-package codesign flow for mixed-signal SiP designs , 2006, IEEE Design & Test of Computers.

[6]  Vijay K. Madisetti,et al.  System on Chip or System on Package? , 1999, IEEE Des. Test Comput..

[7]  P.D. Franzon,et al.  CAD flows for chip-package coverification , 2005, IEEE Transactions on Advanced Packaging.