论文信息 - Worst-case design and margin for embedded SRAM

Worst-case design and margin for embedded SRAM

An important aspect of Design for Yield for embedded SRAM is identifying the expected worst case behavior in order to guarantee that sufficient design margin is present. Previously, this has involved multiple simulation corners and extreme test conditions. It is shown that statistical concerns and device variability now require a different approach, based on work in Extreme Value Theory. This method is used to develop a lower-bound for variability-related yield in memories.

Robert Aitken | Sachin Satish Idgunji

[1] Ding-Ming Kwai,et al. Detection of SRAM cell stability by lowering array supply voltage , 2000, Proceedings of the Ninth Asian Test Symposium.

[2] Kaushik Roy,et al. Statistical design and optimization of SRAM cell for yield enhancement , 2004, ICCAD 2004.

[3] Enrique Castillo. Extreme value theory in engineering , 1988 .

[4] Rajiv V. Joshi,et al. Mixture importance sampling and its application to the analysis of SRAM designs in the presence of rare failure events , 2006, 2006 43rd ACM/IEEE Design Automation Conference.

[5] Sani R. Nassif,et al. Circuit Optimization Using Scale Based Sensitivities , 2006, IEEE Custom Integrated Circuits Conference 2006.