Programming Multiprocessors with Explicitly Managed Memory Hierarchies
暂无分享,去创建一个
[1] Ayal Zaks,et al. Auto-vectorization of interleaved data for SIMD , 2006, PLDI '06.
[2] John D. Owens,et al. GPU Computing , 2008, Proceedings of the IEEE.
[3] X. Feng,et al. PBPI: a High Performance Implementation of Bayesian Phylogenetic Inference , 2006, ACM/IEEE SC 2006 Conference (SC'06).
[4] Jason N. Dale,et al. Cell Broadband Engine Architecture and its first implementation - A performance view , 2007, IBM J. Res. Dev..
[5] P. Hanrahan,et al. Sequoia: Programming the Memory Hierarchy , 2006, ACM/IEEE SC 2006 Conference (SC'06).
[6] Milind Girkar,et al. EXOCHI: architecture and programming environment for a heterogeneous multi-core multithreaded system , 2007, PLDI '07.
[7] Wu-chun Feng,et al. Cell-SWat: modeling and scheduling wavefront computations on the cell broadband engine , 2008, CF '08.
[8] Eduard Ayguadé,et al. A Novel Asynchronous Software Cache Implementation for the Cell-BE Processor , 2007, LCPC.
[9] Kathryn M. O'Brien,et al. Optimizing the Use of Static Buffers for DMA on a CELL Chip , 2006, LCPC.
[10] Adrian Sandu,et al. Optimizing large scale chemical transport models for multicore platforms , 2008, SpringSim '08.