Low Power Low Noise CMOS Chopper Amplifier

AbstractChopping is a proficient way to reduce the low frequency offset and 1/f noise in amplifiers. In this p aper, a low power low noise CMOS chopper amplifier is presented . It is composed of a two stage amplifier. The firs t stage’s high output impedance and the equivalent Miller capacitance of the second stage constitute together a low pass fil ter, which reduces the power consumption. The circuit of the presented amp lifier is designed and simulated at 0.18μm CMOS Pro cess and 1.8V supply. The simulation results show that the averag e power consumption is 44 μW. The chopper amplifier has a gain of 103.5dB and unity gain bandwidth of 100KHz.