A 4-Channel 12-Bit High-Voltage Radiation-Hardened Digital-to-Analog Converter for Low Orbit Satellite Applications
暂无分享,去创建一个
Hua Fan | Fei Qiao | Hadi Heidari | Quanyuan Feng | Kelin Zhang | Dagang Li | Yuanjun Cen
[1] Hua Fan,et al. Exploiting Smallest Error to Calibrate Non-Linearity in SAR Adcs , 2018, IEEE Access.
[2] Tiago R. Balen,et al. Single event transient effects on charge redistribution SAR ADCs , 2017, Microelectron. Reliab..
[3] Waleed Khalil,et al. A 10-bit DC-20-GHz Multiple-Return-to-Zero DAC With >48-dB SFDR , 2017, IEEE Journal of Solid-State Circuits.
[4] Mau-Chung Frank Chang,et al. An R2R-DAC-Based Architecture for Equalization-Equipped Voltage-Mode PAM-4 Wireline Transmitter Design , 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[5] Yvon Savaria,et al. Modeling R-2R Segmented-Ladder DACs , 2010, IEEE Trans. Circuits Syst. I Regul. Pap..
[6] Akihiro Tanaka,et al. 0.5-V 70-nW Rail-to-Rail Operational Amplifier Using a Cross-Coupled Output Stage , 2016, IEEE Transactions on Circuits and Systems II: Express Briefs.
[7] Hua Fan,et al. High-Resolution SAR ADC With Enhanced Linearity , 2017, IEEE Transactions on Circuits and Systems II: Express Briefs.
[8] Bin Li,et al. A four-band TD-LTE transmitter with wide dynamic range and LPF bandwidth calibration , 2017, 2017 International Symposium on VLSI Design, Automation and Test (VLSI-DAT).
[9] M.G.R. Degrauwe,et al. A rail-to-rail input/output CMOS power amplifier , 1989 .
[10] Avireni Srinivasulu,et al. Two Rail-To-Rail Class-AB CMOS Buffers with High Performance Slew Rate and Delay , 2014, 2014 International Conference on Devices, Circuits and Communications (ICDCCom).
[11] Manmath Narayan Sahoo,et al. Modelling of a Fibonacci Sequence 8-bit Current Steering DAC to Improve the Second Order Nonlinearities , 2018 .
[12] Hua Fan,et al. High Linearity SAR ADC for High Performance Sensor System , 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).
[13] Hua Fan,et al. High resolution and linearity enhanced SAR ADC for wearable sensing systems , 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).
[14] Boris Murmann,et al. A 14-Bit 30-MS/s 38-mW SAR ADC Using Noise Filter Gear Shifting , 2017, IEEE Transactions on Circuits and Systems II: Express Briefs.
[15] Chih-Wen Lu. A Rail-To-Rail Class-AB Amplifier With an Offset Cancellation for LCD Drivers , 2009, IEEE J. Solid State Circuits.
[16] W. T. Holman,et al. Design issues for a radiation-tolerant digital-to-analog converter in a commercial 2.0-/spl mu/m BiCMOS process , 1997, RADECS 97. Fourth European Conference on Radiation and its Effects on Components and Systems (Cat. No.97TH8294).
[17] Lloyd W. Massengill,et al. Basic mechanisms and modeling of single-event upset in digital microelectronics , 2003 .
[18] Franco Maloberti,et al. A 10-Bit Radiation-Hardened by Design (RHBD) SAR ADC for Space Applications , 2017, 2017 New Generation of CAS (NGCAS).
[19] Hadi Heidari,et al. A CMOS Current-Mode Magnetic Hall Sensor With Integrated Front-End , 2015, IEEE Transactions on Circuits and Systems I: Regular Papers.
[20] Luca Benini,et al. Smart Energy-Efficient Clock Synthesizer for Duty-Cycled Sensor SoCs in 65 nm/28nm CMOS , 2017, IEEE Transactions on Circuits and Systems I: Regular Papers.