An analytic net weighting approach for performance optimization in circuit placement

We propose an efficient circuit placement ap- proach based on analytic net weighting controls for nonlinear performance constraints. We justify the popular net weight- ing heuristic by first showing that an appropriate net weight- ing is a natural result of the Kuhn-Tucker conditions of cir- cuit placement optimization subject to the performance con- straints. We further give a quantitative analysis of the ef- fect of net weighting to wire length change. An effective net weighting control algorithm has been implemented and ap- plied to real chip designs. The results are very promising. A performance-optimized result can be achieved in 13.2 seconds for a chip with 1,403 circuits. An experimental CMOS chip with 45,296 circuits has a complete placement result in 40 minutes while the wire length measure is 20.3 percent better than a simulated annealing approach.