A reflective functional language for hardware design and theorem proving
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[1] Walid Taha,et al. Multi-stage programming with explicit annotations , 1997 .
[2] Michael J. C. Gordon,et al. Edinburgh LCF: A mechanised logic of computation , 1979 .
[3] John Launchbury,et al. Microprocessor specification in Hawk , 1998, Proceedings of the 1998 International Conference on Computer Languages (Cat. No.98CB36225).
[4] Amy P. Felty,et al. The Coq proof assistant user's guide : version 5.6 , 1990 .
[5] Tobias Nipkow,et al. Executing Higher Order Logic , 2000, TYPES.
[6] Enrico Tronci,et al. Correct Hardware Design and Verification Methods , 2003, Lecture Notes in Computer Science.
[7] Roope Kaivola,et al. Proof Engineering in the Large: Formal Verification of Pentium® 4 Floating-Point Divider , 2001, CHARME.
[8] J. Harrison. Metatheory and Reflection in Theorem Proving: A Survey and Critique , 1995 .
[9] Aaron Stump,et al. On Coquand's \an Analysis of Girard's Paradox" , 2022 .
[10] Simon L. Peyton Jones,et al. Template meta-programming for Haskell , 2002, Haskell '02.
[11] Walid Taha,et al. Multi-Stage Programming: Its Theory and Applications , 1999 .
[12] Walid Taha,et al. Logical Modalities and Multi-Stage Programming , 1999 .
[13] Xavier Leroy,et al. Dynamics in ML , 1991, Journal of Functional Programming.
[14] Alonzo Church,et al. A formulation of the simple theory of types , 1940, Journal of Symbolic Logic.
[15] Mark Aagaard,et al. Divider Circuit Verification with Model Checking and Theorem Proving , 2000, TPHOLs.
[16] Konrad Slind,et al. Treating Partiality in a Logic of Total Functions , 1997, Comput. J..
[17] Tim Sheard,et al. Accomplishments and Research Challenges in Meta-programming , 2001, SAIG.
[18] Lawrence Charles Paulson,et al. Isabelle/HOL: A Proof Assistant for Higher-Order Logic , 2002 .
[19] Matthew Wilding,et al. High-speed, analyzable simulators , 2000 .
[20] Thierry Coquand,et al. A new paradox in type theory , 1995 .
[21] J. Strother Moore,et al. Symbolic Simulation: An ACL2 Approach , 1998, FMCAD.
[22] Simon L. Peyton Jones,et al. Dynamic typing as staged type inference , 1998, POPL '98.
[23] Ganesh Gopalakrishnan,et al. Formal methods in computer-aided design : second international conference, FMCAD '98, Palo Alto, CA, USA, November 4-6, 1998 : proceedings , 1998 .
[24] Patrick Suppes,et al. Introduction To Logic , 1958 .
[25] Michael J. C. Gordon,et al. Why higher-order logic is a good formalism for specifying and verifying hardware , 1985 .
[26] Mary Sheeran,et al. Lava: hardware design in Haskell , 1998, ICFP '98.
[27] Annika Aasa,et al. Concrete syntax for data objects in functional languages , 1988, LISP and Functional Programming.
[28] Michel Mauny,et al. A complete and realistic implementation of quotations for ML , 1994 .
[29] J. Girard,et al. Proofs and types , 1989 .
[30] Thomas F. Melham. Higher Order Logic and Hardware Verification , 1993, Cambridge Tracts in Theoretical Computer Science.
[31] Thierry Coquand,et al. An Analysis of Girard's Paradox , 1986, LICS.
[32] Greg Spirakis. Leading-edge and future design challenges - is the classical EDA ready? , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).
[33] John Harrison,et al. The HOL Light manual (1.1) , 2000 .
[34] Koen Claessen,et al. Observable Sharing for Functional Circuit Description , 1999, ASIAN.
[35] Roope Kaivola,et al. Formal verification of the Pentium(R) 4 multiplier , 2001, Sixth IEEE International High-Level Design Validation and Test Workshop.
[36] Steven D. Johnson. Synthesis of digital designs from recursion equations , 1983 .
[37] Carl-Johan H. Seger,et al. Practical Formal Verification in Microprocessor Design , 2001, IEEE Des. Test Comput..
[38] Walid Taha,et al. Tagless staged interpreters for typed languages , 2002, ICFP '02.
[39] Walid Taha,et al. Multi-stage programming with explicit annotations , 1997, PEPM.
[40] M. Gordon,et al. Introduction to HOL: a theorem proving environment for higher order logic , 1993 .
[41] Carl-Johan H. Seger,et al. Lifted-FL: A Pragmatic Implementation of Combined Model Checking and Theorem Proving , 1999, TPHOLs.
[42] Lawrence C. Paulson,et al. A Higher-Order Implementation of Rewriting , 1983, Sci. Comput. Program..
[43] Carl-Johan H. Seger,et al. Formal verification of iterative algorithms in microprocessors , 2000, Proceedings 37th Design Automation Conference.
[44] Luca Cardelli,et al. On understanding types, data abstraction, and polymorphism , 1985, CSUR.
[45] Mary Sheeran. UpsilonFP : An algebraic VLSI design language , 1983 .
[46] Subject Reduction and Confluence for the reFLect Language , .
[47] A. Leisenring. Mathematical logic and Hilbert's ε-symbol , 1971 .