A VLSI communication architecture for stochastically pulse-encoded analog signals
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A new architecture for interchip communication in pulse coded analog VLSI systems is presented. Interchip communication methods can be compared roughly to computer communication protocols, allowing the use of some known results from computer network theory. We briefly discuss our solution relative to two existing solutions, and present some measured results.
[1] John Wawrzynek,et al. Silicon Auditory Processors as Computer Peripherals , 1992, NIPS.
[2] Misha Anne Mahowald,et al. VLSI analogs of neuronal visual processing: a synthesis of form and function , 1992 .
[3] Eric A. Vittoz,et al. A communication architecture tailored for analog VLSI artificial neural networks: intrinsic performance and limitations , 1994, IEEE Trans. Neural Networks.
[4] Carver Mead,et al. Analog VLSI and neural systems , 1989 .