3D VLSI: A Scalable Integration Beyond 2D

As the semiconductor industry faces serious challenges extending the CMOS roadmap, traditional cost reduction benefits that accompanied power/performance/area (PPA) advantages of successive technology nodes have decreased due to a myriad of process integration challenges and increased variability, reliability, power and thermal constraints. 3D integration technologies have been pursued as a potential solution to help integrate more functions within a confined available dimensions of advanced mobile devices. 3D VLSI (3DV) is an emerging 3D integration technology that unlike packaging-driven 3D technologies (e.g., 2.5D, TSV-based 3D, etc.) can deliver orders of magnitude more integration densities due to extremely small sizes of vertical vias. In this paper, we describe the 3DV technology and its current benefits and challenges. We also survey recent literature that show the potential of 3DV to help continue Moore's law trajectory beyond 2D.

[1]  Sung Kyu Lim,et al.  Power-performance study of block-level monolithic 3D-ICs considering inter-tier performance variations , 2014, 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC).

[2]  Kuan-Neng Chen,et al.  Wafer-to-wafer hybrid bonding technology for 3D IC , 2010, 3rd Electronics System Integration Technology Conference ESTC.

[3]  A. Toffoli,et al.  Advances in 3D CMOS sequential integration , 2009, 2009 IEEE International Electron Devices Meeting (IEDM).

[4]  Rajat Mittal,et al.  Thermal implications of mobile 3D-ICs , 2014, 2014 International 3D Systems Integration Conference (3DIC).

[5]  Andrew B. Kahng,et al.  Scaling: More than Moore's law , 2010, IEEE Design & Test of Computers.

[6]  X. Garros,et al.  New insights on bottom layer thermal stability and laser annealing promises for high performance 3D VLSI , 2014, 2014 IEEE International Electron Devices Meeting.

[7]  Sung Kyu Lim,et al.  Design and CAD methodologies for low power gate-level monolithic 3D ICs , 2014, 2014 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED).