A kernel-independent, pipelined architecture for real-time 2-D convolution

Existing architectures for 2-D convolution suffer from such drawbacks as inflexibility with respect to image and/or kernel sizes (systolic arrays) or data distribution and collection overhead (SIMD processor arrays). This paper introduces a pipelined architecture that maps different sizes and shapes of kernels on a fixed size array of computing elements using a single pass of the input data. It is shown that the array can be operated at its highest throughout for any kernel size. Interfacing this architecture with the host requires receiving and outputting data in a simple raster-scan fashion.