A 5-GHz direct-conversion receiver with I/Q phase and gain error calibration [WLAN applications]

This paper describes the design of a 5-GHz direct conversion receiver with phase and gain error calibration for WLAN applications. Integrating both LNA and mixer in a single chip, the conversion gain of the RF receiver is switchable to compromise between linearity and noise performance. In addition, calibration schemes are proposed to compensate gain and phase errors in the I/Q signal paths. By means of this technique, the measured phase error is reduced to less than 0.6/spl deg/ and gain error less than 0.2 dB. The receiver provides a conversion gain of 28.2 dB in the high gain mode and 11.6 dB in the low gain mode within the signal bandwidth. The overall noise figure is 6.4 dB in the high gain mode, and the third-order input intercept point (IIP3) is about -6.8 dBm in the low gain mode. Implemented in a 0.18-/spl mu/m CMOS technology, it consumes 37.4 mW from a 1.8 V supply. The chip area is 1.64 mm/sup 2/.

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