Real-time smoothing filter for three dimensional disparity map algorithm and hardware implementation

Nowadays, 3D-image processing of stereovision that uses two camera lenses has been a vibrant research filed. This paper proposes an efficient hardware architecture for high performance and real-time smoothing filter that is applicable to enhance the disparity map image from 3D stereovision system. First, we maximally utilized the parallel and pipeline operations. Second, we adopted 11 by 11 sparse mask operations instead of using the 33 by 33 window to achieve faster processing time without sacrificing the quality obtained from 33 by 33 mask operation. Furthermore, our architecture showed faster in processing time and smaller in errors on the images, compared with the normal 33 by 33 mean filter. Our verification was accomplished on the Virtex5 XC5VLX330 FF1760 FPGA of Xilinx with using 100MHz system clock. In a 1280 by 720 video frames, our verification shows that the real-time image was processed with 325fps. Our achievement shows remarkably higher operation rates than the existing ordinary mean filtering method.

[1]  L.S. DeBrunner,et al.  Sparse FIR filters and the impact on FPGA area usage , 2008, 2008 42nd Asilomar Conference on Signals, Systems and Computers.

[2]  Tian-Sheuan Chang,et al.  Algorithm and Architecture of Disparity Estimation With Mini-Census Adaptive Support Weight , 2010, IEEE Transactions on Circuits and Systems for Video Technology.

[3]  Stephen Neuendorffer,et al.  FPGA Pipeline Synthesis Design Exploration Using Module Selection and Resource Sharing , 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[4]  Yoon-Gu Kim,et al.  Low Power Design of Filter Based Face Detection Hardware , 2008 .

[5]  Pei-Yung Hsiao,et al.  Generic 2-D gaussian smoothing filter for noisy image processing , 2007, TENCON 2007 - 2007 IEEE Region 10 Conference.

[6]  Behrooz Parhami,et al.  Computer arithmetic - algorithms and hardware designs , 1999 .