Investigation and comparison of thermal distribution in synchronous and asynchronous 3D ICs

This paper presents an analysis and comparison between synchronous and delay-insensitive asynchronous logic circuits on thermal distributions for investigating novel solutions to the heat dissipation problem in three-dimensional ICs. Due to the spatial and temporal distribution of switching activities in delay-insensitive asynchronous circuits, the thermal density as well as the temperature is largely reduced. Results show that the sample delay-insensitive asynchronous circuit exhibits lower average temperature and more uniform thermal distribution compared to it's synchronous counterpart.

[1]  Gerald E. Sobelman,et al.  CMOS circuit design of threshold gates with hysteresis , 1998, ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187).

[2]  Sachin Sapatnekar,et al.  Efficient Thermal Placement of Standard Cells in 3D ICs using a Force Directed Approach , 2003, ICCAD 2003.

[3]  Jun Yang,et al.  Thermal Management for 3D Processors via Task Scheduling , 2008, 2008 37th International Conference on Parallel Processing.

[4]  Narayanan Vijaykrishnan,et al.  Interconnect and thermal-aware floorplanning for 3D microprocessors , 2006, 7th International Symposium on Quality Electronic Design (ISQED'06).

[5]  Ronald F. DeMara,et al.  Delay-insensitive gate-level pipelining , 2001, Integr..

[6]  David E. Muller Asynchronous logics and application to information processing , 1962 .

[7]  Behrooz Parhami,et al.  Computer arithmetic - algorithms and hardware designs , 1999 .

[8]  Yuan Xie,et al.  Temperature-Aware Task Allocation and Scheduling for Embedded Multiprocessor Systems-on-Chip (MPSoC) Design , 2006, J. VLSI Signal Process..

[9]  Scott C. Smith,et al.  Completion-Completeness for NULL Convention Digital Circuits Utilizing the Bit-Wise Completion Strategy , 2003, VLSI.

[10]  Scott A. Brandt,et al.  NULL Convention Logic/sup TM/: a complete and consistent logic for asynchronous digital circuit synthesis , 1996, Proceedings of International Conference on Application Specific Systems, Architectures and Processors: ASAP '96.

[11]  Scott C. Smith,et al.  Design and Characterization of NULL Convention Arithmetic Logic Units , 2007, VLSI.

[12]  Jason Cong,et al.  A thermal-driven floorplanning algorithm for 3D ICs , 2004, IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004..

[13]  Narayanan Vijaykrishnan,et al.  Thermal trends in emerging technologies , 2006, 7th International Symposium on Quality Electronic Design (ISQED'06).

[14]  Ronald F. DeMara,et al.  Optimization of NULL convention self-timed circuits , 2004, Integr..

[15]  Daniela De Venuto,et al.  International Symposium on Quality Electronic Design , 2005, Microelectron. J..