Enhancement-Mode 300-mm GaN-on-Si(111) With Integrated Si CMOS for Future mm-Wave RF Applications
暂无分享,去创建一个
M. Radosavljevic | H. Then | I. Ban | P. Fischer | P. Nordeen | S. Rami | I. Momson | A. Zubair | P. Koirala | T. Michaelos | A. Oni | J. Peck | Q. Yu | A. Vyatskikh | N. Nair | T. Hoff | M. Beumer | H. Vora | D. Thomson | A. Latorre-Rey | S. Bader | R. Jordan
[1] M. Radosavljevic,et al. Scaled Submicron Field-Plated Enhancement Mode High-K Gallium Nitride Transistors on 300mm Si(111) Wafer with Power FoM (RON xQGG) of 3.1 mohm-nC at 40V and fT/fMAX of 130/680GHz , 2022, 2022 International Electron Devices Meeting (IEDM).
[2] Jessica C. Chou,et al. 5G mmWave Power Amplifier and Low-Noise Amplifier in 300mm GaN-on-Si Technology , 2022, 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits).
[3] William J. Lambert,et al. A 32-A, 5-V-Input, 94.2% Peak Efficiency High-Frequency Power Converter Module Featuring Package-Integrated Low-Voltage GaN nMOS Power Transistors , 2022, IEEE Journal of Solid-State Circuits.
[4] M. Radosavljevic,et al. Advanced Scaling of Enhancement Mode High-K Gallium Nitride-on-300mm-Si(111) Transistor and 3D Layer Transfer GaN-Silicon Finfet CMOS Integration , 2021, 2021 IEEE International Electron Devices Meeting (IEDM).
[5] R. Kotlyar,et al. Advances in Research on 300mm Gallium Nitride-on-Si(111) NMOS Transistor and Silicon CMOS Integration , 2020, 2020 IEEE International Electron Devices Meeting (IEDM).
[6] D. Jena,et al. GaN HEMTs on Si With Regrown Contacts and Cutoff/Maximum Oscillation Frequencies of 250/204 GHz , 2020, IEEE Electron Device Letters.
[7] J. Laroche. Towards a Si foundry-compatible GaN-on-Si MMIC process on 200mm Si with Cu damascene BEOL (Conference Presentation) , 2020 .
[8] M. Radosavljevic,et al. 3D heterogeneous integration of high performance high-K metal gate GaN NMOS and Si PMOS transistors on 300mm high-resistivity Si substrate for energy-efficient and compact power delivery, RF (5G and beyond) and SoC applications , 2019, 2019 IEEE International Electron Devices Meeting (IEDM).
[9] Kei May Lau,et al. Enhancement-Mode GaN MOS-HEMTs With Recess-Free Barrier Engineering and High- ${k}$ ZrO2 Gate Dielectric , 2018, IEEE Electron Device Letters.
[10] M. Radosavljevic,et al. High-K gate dielectric depletion-mode and enhancement-mode GaN MOS-HEMTs for improved OFF-state leakage and DIBL for power electronics and RF applications , 2015, 2015 IEEE International Electron Devices Meeting (IEDM).
[11] J. Kavalieros,et al. Experimental observation and physics of “negative” capacitance and steeper than 40mV/decade subthreshold swing in Al0.83In0.17N/AlN/GaN MOS-HEMT on SiC substrate , 2013, 2013 IEEE International Electron Devices Meeting.
[12] Kuei-Shu Chang-Liao,et al. Study of gate oxide traps in HfO2/AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors by use of ac transconductance method , 2013 .
[13] T. E. Kazior,et al. High Performance Mixed Signal and RF Circuits Enabled by the Direct Monolithic Heterogeneous Integration of GaN HEMTs and Si CMOS on a Silicon Substrate , 2010, 2011 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS).
[14] M. Kanamura,et al. Enhancement-mode GaN MIS-HEMTs for power supplies , 2010, The 2010 International Power Electronics Conference - ECCE ASIA -.
[15] T. Oka,et al. AlGaN/GaN Recessed MIS-Gate HFET With High-Threshold-Voltage Normally-Off Operation for Power Electronics Applications , 2008, IEEE Electron Device Letters.
[16] Shreepad Karmalkar,et al. Enhancement of breakdown voltage in AlGaN/GaN high electron mobility transistors using a field plate , 2001 .
[17] S. Keller,et al. High breakdown GaN HEMT with overlapping gate structure , 2000, IEEE Electron Device Letters.
[18] A. Plößl. Wafer direct bonding: tailoring adhesion between brittle materials , 1999 .
[19] P. Bai,et al. A high performance 180 nm generation logic technology , 1998, International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).
[20] R.H. Dennard,et al. Design Of Ion-implanted MOSFET's with Very Small Physical Dimensions , 1974, Proceedings of the IEEE.
[21] G.E. Moore,et al. Cramming More Components Onto Integrated Circuits , 1998, Proceedings of the IEEE.