A 10-Gb/s burst-mode limiting amplifier using a two-stage active feedback circuit
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Jun Terada | Masafumi Nogawa | Kazuyoshi Nishimura | Susumu Nishihara | Yusuke Ohtomo | K. Nishimura | Y. Ohtomo | J. Terada | S. Nishihara | M. Nogawa | Makoto Nakamura | Makoto Nakamura
[1] Sang-Gug Lee,et al. A CMOS Burst-Mode TIA with Step AGC and Selective Internally Created Reset for 1.25Gb/s EPON , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.
[2] S. Kimura,et al. A Burst-Mode 3R Receiver for 10-Gbit/s PON Systems With High Sensitivity, Wide Dynamic Range, and Fast Response , 2008, Journal of Lightwave Technology.