Reform buffer for vector data streams

The invention discloses a reform buffer for vector data streams, which comprises a buffer memory stack, a control register, a status bit and a main control logic unit, wherein the buffer memory stack is used for temporarily storing data which comes from a DMA bus and is written into a vector memory VM or temporarily storing data which is read from the vector memory VM and required to be written into other spaces by the DMA bus; the control register is used for carrying out data configuration when the DMA bus starts to carry out data transmission; the status bit is used for recording that which row in the vector memory VM is mapped by each row in the buffer memory stack, and recording whether the row is effective; and the main control logic unit is used for overall control, when the DMA bus carries out the data transmission, the main control logic unit selects different buffer positions according to the control register, carries out corresponding data conversion, and selects whether tocancel or re-process the reading of the buffer when the data transmission is completed. The reform buffer has the advantages of simple and compact structure, low cost, wide application range, and good reliability, etc.