A novel technique for the design of very low temperature coefficient (TC) voltage references in a CMOS standard process is presented. The proposed circuit uses an all CMOS technique to generate a low TC voltage reference over a wide temperature range. A self-biased V"t"h (threshold voltage) generator circuit creates a voltage equal to the V"t"h of a CMOS transistor; this voltage is used to generate a current proportional to V"t"h^2 that, when forced into another transistor, creates a voltage which presents a negative non-linear temperature coefficient. A voltage with a positive TC, which can be controlled by the aspect ratio of a pair of transistors, is generated by a current mirror asymmetrically degenerated with a high-poly resistor. A curvature correction, provided by a current proportional to V"t"h^2, is used to modify the thermal behaviour of this positive TC voltage. By adding the positive and negative TCs voltages, a very stable reference voltage can be obtained. The circuit was designed to be implemented in a standard CMOS process (AMS 0.35@mm), and simulated results indicate that a variation of only 2.5ppm/^@?C is expected over the temperature range of 0-90^@?C.
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