Implementation of C/A code generator in GPS with FPGA

FPGA has been used as a design method in the simulation of C/A code generator in high dynamic GPS.C/A code plays an important part in realising code division,coarse acquisition of satellite signal and acquisition of precise code(p code) with HOW(Handover Word).In light of literature[1],C/A code is employed to generate equations.The circuit is realized with software ISE in VERILOG HDL(Hardware description language).The program is simulated and synthesized with MODESIM and SYNPLIFY respectively.A comparison between the results from figure 3 and those of literature[1] indicates the correctness of the design proposed in this paper.