Rewiring hasbeenusedextensively foroptimizing the area, thepowerconsumption, thedelay, andthetestabilityofacircuit. Inthis work, wedemonstrate howrewiring canalsobeusedforreducing theSoft Error Rate(SER). Weemploy anATPG-based rewiring method togenerate functionally-equivalent yetstructurally-dif ferent implementations ofa logic circuit basedonsimple transformation rules. Thisrewiring capability, along withanoff-the-shelf methodfor assessing theSERofacircuit, enable theintegration oftheSERinaunified search algorithm that iteratively evolves thedesign inorder tosatisfy a given setofobjectives. Experimental results onISCAS'89 andITC'99 benchmarkcircuits verify that rewiring canindeed besuccessfully usedtoreduce theSERofacircuit and,thus, itfacilitates adesign-space exploration framework fortrading off area, powerconsumption, delay, testability, andSER.
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