Thermal Dynamics of Multicore Integrated Systems

This paper presents an analysis of thermal dynamics in multicore systems, focusing on time response to heat generated in a single core and its connection with very large scale integration (VLSI) design principles. For the purpose of this paper, a point heating time (PHT) concept is introduced. PHT is a value that describes the time of temperature growth to its limited value. The PHT value is used for estimating the thermal capabilities of multicore systems. The physical properties of VLSI systems are taken into account for determining easy-to-apply rules of thermal dynamic response in common chip designs. The authors compare PHT in different physical conditions and its value versus displacement of the active thermal module away from the center position on the chip. An equation derived from analytical assumptions is the basis for asynchronous control of core activity toward minimizing its peak temperature. Final analysis leads to the conclusion that the paper can be used as a supplementary guide in VLSI chip development for better thermally optimized multicore chips.

[1]  Dirk Grunwald,et al.  Thermal Management with Asymmetric Dual Core Designs , 2003 .

[2]  Uri C. Weiser,et al.  Interconnect-power dissipation in a microprocessor , 2004, SLIP '04.

[3]  Andrzej Kos.  Thermal time constants of VLSI circuits , 2001, Other Conferences.

[4]  Philip Levis,et al.  Policies for dynamic clock scheduling , 2000, OSDI.

[5]  H. Peter Hofstee,et al.  Power efficient processor architecture and the cell processor , 2005, 11th International Symposium on High-Performance Computer Architecture.

[6]  Vu Duong,et al.  High Temperature Experiments for Circuit Self-Recovery , 2004, GECCO.

[7]  Mitsuhisa Sato,et al.  Profile-based optimization of power performance by using dynamic voltage scaling on a PC cluster , 2006, Proceedings 20th IEEE International Parallel & Distributed Processing Symposium.

[8]  Andrzej Kos,et al.  Asynchronous control of modules activity in integrated systems for reducing peak temperatures , 2008, Integr..

[9]  Takayasu Sakurai,et al.  Perspectives of Low-Power VLSI's (INVITED) , 2004 .

[10]  Kevin Skadron,et al.  Temperature-Aware Microarchitecture: Extended Discussion and Results , 2003 .

[11]  Shahin Nazarian,et al.  Thermal Modeling, Analysis, and Management in VLSI Circuits: Principles and Methods , 2006, Proceedings of the IEEE.

[12]  Mark D. Corner,et al.  Turducken: hierarchical power management for mobile devices , 2005, MobiSys '05.

[13]  Thomas D. Burd,et al.  The simulation and evaluation of dynamic voltage scaling algorithms , 1998, Proceedings. 1998 International Symposium on Low Power Electronics and Design (IEEE Cat. No.98TH8379).

[14]  Balaram Sinharoy,et al.  POWER4 system microarchitecture , 2002, IBM J. Res. Dev..

[15]  Wu-chun Feng,et al.  Reducing Overheating-Induced Failures Via Performance-Aware CPU Power Management ? , 2005 .

[16]  Adrian Stoica,et al.  Evolvable hardware solutions for extreme temperature electronics , 2001, Proceedings Third NASA/DoD Workshop on Evolvable Hardware. EH-2001.

[17]  E. Fluhr,et al.  Design and Implementation of the POWER6 Microprocessor , 2008, IEEE Journal of Solid-State Circuits.

[18]  K. Langendoen,et al.  Energy priority scheduling for variable voltage processors , 2001, ISLPED'01: Proceedings of the 2001 International Symposium on Low Power Electronics and Design (IEEE Cat. No.01TH8581).

[19]  Dake Liu,et al.  Power consumption estimation in CMOS VLSI chips , 1994, IEEE J. Solid State Circuits.

[20]  R. Viswanath.  Thermal Performance Challenges from Silicon to Systems , 2000 .

[21]  Bruce Jacob,et al.  A control-theoretic approach to dynamic voltage scheduling , 2003, CASES '03.

[22]  Parthasarathy Ranganathan,et al.  Energy Consumption in Mobile Devices: Why Future Systems Need Requirements-Aware Energy Scale-Down , 2003, PACS.

[23]  A. Golda,et al.  Energy losses in digital CMOS integrated circuits: State-of-the-art and future trends , 2008, 2008 International Conference on Signals and Electronic Systems.