A Filter Processor For Interpolation And Decimation

This paper introduces a 92-bit f i l ter processor intended for decimation and interpolation. Considerable improvements in multiplication t ime and silicon area have been achieved by tailoring the hardware for multiplier-free algorithms. T h e prototype's program code realizes a mul t i stage decimator f o r audio 20-bit A / D converter wi th three multi-stage half-band filters and a n equalizer.