Threshold direct synthesis structure for digital delta-sigma modulators
暂无分享,去创建一个
[1] Michael H. Perrott,et al. A 27-mW CMOS fractional-N synthesizer using digital compensation for 2.5-Mb/s GFSK modulation , 1997, IEEE J. Solid State Circuits.
[2] B. Miller,et al. A multiple modulator fractional divider , 1990, 44th Annual Symposium on Frequency Control.
[3] F. Maloberti,et al. A comparative study of digital /spl Sigma//spl Delta/ modulators for fractional-N synthesis , 2001, ICECS 2001. 8th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.01EX483).
[4] B.-S. Song,et al. A 1.1-GHz CMOS fractional-N frequency synthesizer with a 3-b third-order /spl Delta//spl Sigma/ modulator , 2000, IEEE Journal of Solid-State Circuits.
[5] Calvin Plett,et al. An agile ISM band frequency synthesizer with built-in GMSK data modulation , 1998 .
[6] Bang-Sup Song,et al. A 1.1 GHz CMOS fractional-N frequency synthesizer with a 3b 3rd-order ΔΣ modulator , 2000 .
[7] T. Riley,et al. Delta-sigma modulation in fractional-N frequency synthesis , 1993 .
[8] Bram De Muer,et al. On the analysis of ΔΣ fractional-N frequency synthesizers for high-spectral purity , 2003, IEEE Trans. Circuits Syst. II Express Briefs.
[9] Gabor C. Temes,et al. Understanding Delta-Sigma Data Converters , 2004 .
[10] E. Hegazi,et al. A 17 mW transmitter and frequency synthesizer for 900 MHz GSM fully integrated in 0.35-/spl mu/m CMOS , 2002, 2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302).