Novel Silicon-Controlled Rectifier With Snapback-Free Performance for High-Voltage and Robust ESD Protection

A novel snapback-free silicon-controlled rectifier (SFSCR) with P-type Zener implantation (ZP) is developed in a 0.5-<inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> bipolar CMOS DMOS technology for latch-up immune high-voltage (HV) electrostatic discharge (ESD) protection. The inherent snapback of SCR is successfully suppressed by the novel ZP technique. But, it also brings about a serious degradation in failure current (<inline-formula> <tex-math notation="LaTeX">${I}_{\textsf {t2}}$ </tex-math></inline-formula>) when compared with the regular low holding voltage (<inline-formula> <tex-math notation="LaTeX">${V}_{h}$ </tex-math></inline-formula>) device. In order to mitigate such degradation, a novel layout terminal is proposed. According to the transmission-line pulse test results, <inline-formula> <tex-math notation="LaTeX">${I}_{\textsf {t2}}$ </tex-math></inline-formula> of the SFSCR with new layout is increased by 58.5%, while the ON-state resistance (<inline-formula> <tex-math notation="LaTeX">${R}_{ \mathrm{\scriptscriptstyle ON}}$ </tex-math></inline-formula>) is reduced by 48.7% under the same layout area. By comprehensive comparison, the SFSCR is proved to be a potential HV ESD solution.

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