Chaotic systems have several engineering applications such as cryptology, random number generators, image processing and secure communication. A basic structure used in these studies is a chaotic oscillator design that produces a chaotic signal. In this paper, 5-D hyperchaotic Lorenz system (Hu, 2009) has been implemented on FPGA using Heun algorithm to improve the chaos-based embedded engineering applications. The 32-bit IEEE-754-1985 floating point format has been used in the Heun-based design. The design has been coded in VHDL. The maximum operating frequency of FPGA-based 5-D hyperchaotic Lorenz system reaches 430.146 MHz. In addition, a real circuit realisation of 5-D hyperchaotic Lorenz system has been performed using analogue circuit elements. The results of FPGA-based new 5-D hyperchaotic Lorenz system have been compared with the results of computer-based numerical simulation and then the error analyses (MSE and RMSE) have been carried out.